I would like to connect four AD9371 components to the BBP in multichip synchronization for MIMO application.
1. Can I do it with one AD9528 component ?
2. Can you send me information about this issue ? (Reference design or block diagram)
3. Should the trace length of DEV_CLK and SYSREF be the same for each AD9371 component ?
4. Should the trace length of SERDIN, SERDOUT, SYNCINB0/1 and SYNCOUTB0 be the same for each AD9371
I would like to test the AD9371 with DPD + CFR capabilities.
1. How did Analog Tested the AD9371 with DPD and CFR capabilities ?
2. Can you send me any relevant information about this issue ? (Test results, FPGA used for this application)
3. Is there a specific digital board (contain DPD, CFR) that can interface to the AD9371 ?