AnsweredAssumed Answered

transferring high bit rates data between PS and PL

Question asked by RafciuK on Feb 8, 2017
Latest reply on Feb 8, 2017 by RafciuK

I'm designing a wireless system to transmit HD video (6-8 Mb/s) from an IP camera, based on PicoZed SDR. I'm using model-based design to implement all signal processing blocks in FPGA. One of the problems I have encountered so far is transferring UDP packets from the ethernet interface in the Zynq PS to PL (i'm using AD9361 Reference Design). From what I've read in the forum the libiio limits the rates to 1-3 Ms/s, which is far below my requirements. Could you please advise me on possible solutions? I have to add that the UDP packets should be processed (i.e filtered based on MAC or IP address) in the PS. I would appreciate any help.