Dear Support Community,
I need clarifications on the followings regarding ADDI7004 before full-fledged CMOS image sensor capture board development. I really appreciate your feedbacks.
Q1) Our sensor, “photo signal” comes first, then “amplifier reset” follows. The differential signals do not cross assuming no offsets, but it is different than specified in the datasheet of “amplifier reset first”. So, my idea was to us “Non-inverting” mode, in which the inverse-relation of the output format is allowed. Please note that the input common mode is different between two phases and I think it is quite alright since the AFE uses the differential input pair at the very beginning understanding a bit of common mode noise contaminates. Please let me know if the output format and a use of “Non-inverting” is do-able?
Q2) Should I also shift “SHP” pulse to the 2nd half?
Q3) What “Non-inverting mode” is actually doing in the circuit? Swapping INP and INM?
Q4) I assume we get 0LSB out of the AFE when INP and INM are crossed. Is this correct?
Q5) According to Figure 30 as shown below, INP and INM can be swapped by changing SHP and SHD timings. Is this correct? We are going to use the external control.
Q6) “Non-inverting” is for the internal timing generator to switch SHP and SHD?
Q7) 0.1uF coupling cap. is needed for CDS and this capacitor is periodically connected to a DC voltage to keep VICM at 1.8V or so. I am assuming an external AFE driver does not load this cap. all the time. We think Ic=100mA, matched NPN BJT is appropriate. But could you please give us your recommendation of driver circuit and components?
Q8) In the datasheet, DC restore operation is coincident with SHP=HI. But I think it should be SHP=LO when CCD/CMOS is generating the floating diffusion output voltage. Otherwise the AFE will do CDS using the next pixel’s reset level. Please let me clarify on this.
Toshinori Otaka, Brillnics Japan, Ltd.