I am working with an FMCOMMS3 board connected to an Avnet Microzed Board.
I am using the No-OS software provided by Analog in order to initialize the AD9361 transceiver, and it seems to work correctly. However I have some questions.
1) the Rx sampling rate after initialization appears to be 30.720 Mhz (as provided by the function ad9361_get_rx_sampling_freq). I have enabled the clk_out function on the board changing the corresponding field of the
default_init_param structure from:
CLKOUT_DISABLE, //clk_output_mode_select *** adi,clk-output-mode-select
ADC_CLK_DIV_16, //clk_output_mode_select *** adi,clk-output-mode-select
In my understanding I should find a clock with frequency equal to 30.720/16=1.92 Mhz on the clk_out pin of P202, but I found a frequency equal to 15.3 Mhz. Is the actual sampling frequency different from the value returned by the function ad9361_get_rx_sampling_freq or I have misunderstood the behavior of clk_out pin?
2) I wish to change the content of the default_init_param structure in order to configure the AD9361 as follows:
* one Rx and one Tx channel enabled in FDD mode
* sampling frequency equal to 16 Mhz
what are the fields of the default_init_param structure that needs to be changed? More generally, where can I found a guide regarding how to modify these fields to meet my requirements?
3) In order to make some test I would like to inject a signal on the Rx side of the AD9361 and transmit the same signal on the Tx side. I plan to use the programmable logic on the Microzed Board in order to connect the RX_FRAME signal to the TX_FRAME signal, the DATA_CLK signal to the FB_CLK signal and the RX_D signals to the TX_D signals. Is this connection possible and safe?
Marco V. Arbolino