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Explanation of 21489 note in EE286_rev5 pg 3

Question asked by ahonkan on Sep 15, 2011
Latest reply on Oct 18, 2011 by DeepV



Can you give me a little bit more information on why I cannot run the SD controller at 133 Mhz to interface to a 133 Mhz SDRAM?  The note on pg 3 is quite cryptic.


I've got a 21489 400 Mhz  interfacing to Micron MT48LC16M16A2P-75 133 Mhz SDRAM.  Reading the ADSP-214xx SHARC Processor
Hardware Reference guide (rev 0.3), I expected to get 133 Mhz performance out of that part.  Now it seems I have to run it at 114 Mhz.