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AD9656 - configuration over SPI

Question asked by Dzunior on Feb 6, 2017
Latest reply on Jul 6, 2017 by Lt.Coder

Hi,

I have created the design, and I'm able to see K28.5 frames. I see that my Xilinx JESD core get synchronised with the AD9656, but after some samples (which appear not to be real) it lost sync and re-sync again. I would like to be sure that my config for AD9656 is correct. Can you please give me what registers (and in what order - as it seems to be very important) are programmed to AD9656 via SPI in example with HSC-ADC-EVALEZ (or any other board)?

 

Thanks,

Dominik

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