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question of UVLO feature in ADN8831

Question asked by robin.hu Employee on Feb 6, 2017
Latest reply on Feb 16, 2017 by ledelson

In datasheet of ADN8831,

1. The "Undervoltage Lockout" is typical 2.2V with 2.6V as maxim, there is a note about the UVLO: "The ADN8831 does not work when the supply voltage is less than UVLO." So the 1st question is:

1) if Vdd<UVLO

what is the (PWM)output of ADN8831? is it un-determined or just lock out to default value? what is the default value(low or high?);

 

2. The power supply range is typical 3V with 5.5V as maxim, so the 2nd question is:

2). if UVLO<Vdd<3V

what is the PWM output of ADN8831? un-garanteed?

 

As I know, in most gate drivers, the part will output default value(say low) if the VDD is under UVLO, but not "does not work", please help clarify. Thanks. 

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