I'm trying to calculate checksum in software to verify it against the one calculated by the metering IC.
I have received a spreadsheet of registers used for calculating checksum for ADE7858A and have a couple of questions about it.
I’ll try to cover everything thoroughly since I’m trying to understand it myself, and don’t want to make any erroneous assumptions.
There are 2344 bits total that are fed into LFSR that generates a CRC-32 checksum for ADE7858A.
The default checksum should be 0xE908F4D0
Internal registers (refer to spreadsheet) make a total of 48 bits long, and in hex the default array of bits looks like this: 000020000400
Those are fed into LFSR first, starting with 0 then 0, 4, 0, etc
There are 48 bits above, so that works out.
Next we have configuration registers. In hex the array is 000000000000000001ff00000e88000000000000000000000000000003bd1c00780000
There are 280 bits in here so documentation on page 66 showing configuration registers are a total of 280 bits works out.
Those are fed into LFSR starting from register CFG_REVA as least significant
Then we get to DSP data memory ram registers.
There are a total of 63 registers between address 0x4380 and 0x43BE. All initial values are 0 so I won’t bother pasting that array in here.
They are mainly 24 bit registers with exception of Reserved-32 registers in that excel sheet you’ve provided.
However the total number of bits here is 1568
56 24 bit registers and 7 32 bit registers
The number of bits I expect based on datasheet is 2064 for that section.
Even if I assume all registers are 32 bits long, that still lands 2016, a bit short of expected.
What am I missing? Is the way I count them wrong? Is the way I assume they are fed into lfsr okay?
Do you have any sample code that performs this crc calculation I can take a look at?
I’ve attached a spreadsheet I am using as reference, plus some modifications I made
Thank you for your patience,