I recently designed and manufactured multiple units of a DDS signal generator based on AD9914 chips. The circuit contains three AD9914 which need to be synchronized. Actually, the synchronization of most of the units works pretty fine with almost the same setting for the SYNC_IN / SYNC_OUT Delay registers. This makes me very confident in my design (like transmission line, chip choise etc). Everytime I power on the whole unit I get the exact same phase states at the ouputs of all my DDS Chips (in other words: all the SYNC_CLKs to the FPGA that controls the chips are aligned with the same phasing to a reference t0-pulse)
However, there are a few units where the Synchronization mechanism simply doesn't work. Since there are many possible register settings, its unhandy just to try-and-error some register settings - there are just too many.
Measuring the SYNC_IN with respect to the REFCLK can also become very tricky because you have to align the edges of a 1920 MHz "differentially-probed" signal (REFCLK) with a 5 MHz "commonly-probed" signal.
* Is there anyone here who already has thought about automatink the multi-chip synchronization process? Are there any thoughts or ideas on this? I've already read the app note AN1254 and know how it works.
I'm just looking for nice ideas to automate the process properly like with an oscilloscope measureing the SYNCLKs and MATLAB reading data from the oscilloscope and analyzing it .....