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AD8564 Output transition

Question asked by avraka on Jan 25, 2017
Latest reply on Feb 2, 2017 by rrosario

Dear ADIer

 

My customer is testing a high speed comparator with AD8564.

One channel output of AD8564 shows fast transition and the other channel shows slow transition if driver output change from logic high to logic low and then leave as high impedance status,

 

In my understand, comparator output is not changed although input is not biased or leaved as a floating state.

My qustion for this  is

1. What happen if comparator input goes into high impedance or leave float state?

2. As you can see below, supply voltage range exeed the recommendation. Does it affect abnormal transition?

3. Should I add an additional pull-up or pull-down resistor on input pin to solve the output transition?

4. What should I check in more detail to fix this issues. For example, input capacitance, series resistor between driver output and comparator input, FPGA internal PU/PDOWN and so on..

 

 

Best Regards

YS

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