I couldn’t find any straight forward, step by step instructions for changing the sampling rate for the AD-FMCDAQ2 board connected to the KCU102.
The original board has a XO running at 125MHz for a 500Msps sampling rate. Customer needs a 204.8Msps sampling rate and has changed the XO for a 102.4MHz, requiring only a x2 on the PLL.
What are the steps involved in:
1) Configuring the AD9144 and the AD9523 on the AD-FMCDAQ2 board through the FGPA project on the KCU102.
2) What are the registers that need to be changed on the JESD204 IP for the JESD204 interface to work
A step by step procedure and a way to check the results would be very helpful, since every rebuild of the bitstream for the KCU102 takes 1:30h to complete.