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Why is my AD9162 Eval Board not Locking to an external reference clock?

Question asked by jlecomte on Jan 23, 2017
Latest reply on Feb 10, 2017 by danf

I am trying to control an AD9162-FMCB-EBZ evaluation board using a Xilinx KCU105 evaluation board and an external reference clock.  I have written firmware to control the ADF4355, AD9508, and AD9162 on the evaluation board, but I cannot seem to get the AD9162 to lock to the REFCLK or the SYSREF.  Is there any documentation on what the register settings should be for each part?  I have a 125MHz external reference going into the ADF4355 to generate my DAC clock at 2GHz. 

 

The AD9162 locks to an external reference through J31, but won't lock tot he clock coming from the ADF4355.  The AD9162 also reports that there is too much jitter on the SYSREF signal (I get this information by reading register x024).

 

Any suggestions?

 

Thank you,

John

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