we are using a custom sc589 design and have SRAM attached to SMC0.
I have configured SMC0 registers
SMC_B0CTL.EN = 1; /**< Bank 0 Enabled */
SMC_B0CTL.MODE = 0; /**< Memory Access Mode Async SRAM */
SMC_B0CTL.SELCTRL = 2; /**< Select Control : ????? Angeblich sind AMS, AOE und AWE angeschlossen !!*/
SMC_B0CTL.RDYEN = 0; /**< ARDY Enable */
SMC_B0CTL.RDYPOL = 0; /**< ARDY Polarity, don't care */
SMC_B0CTL.RDYABTEN = 0; /**< ARDY Abort Enable */
SMC_B0CTL.PGSZ = 0; /**< Flash Page Size, don't care */
SMC_B0TIM.WST = 7; /**< Write Setup Time, max 7 */
SMC_B0TIM.WHT = 7; /**< Write Hold Time max 7 */
SMC_B0TIM.WAT = 63; /**< Write Access Time max 63 */
SMC_B0TIM.RST = 7; /**< Read Setup Time, max 7 */
SMC_B0TIM.RHT = 7; /**< Read Hold Time, max 7 */
SMC_B0TIM.RAT = 63; /**< Read Access Time, max 63 */
SMC_B0ETIM.PREST = 3; /**< Pre Setup Time, max 3 */
SMC_B0ETIM.PREAT = 3; /**< Pre Access Time, max 3 */
SMC_B0ETIM.TT = 7; /**< Transition Time, max 7 */
SMC_B0ETIM.IT = 7; /**< Idle Time, max 7 */
SMC_B0ETIM.PGWS = 2; /**< Page Wait States 2-15, but ignored */
I try to access the SRAM at address 0x40000000, but still I cannot see any activity on AMS, AOE or AWE while trying to read or write to SRAM address.
Do I miss to configure something (maybe SCB ?) to be able to access SMC0 from the ARM core ?