AD8333: Is there any limitation in frequency and duty cycle time for enable/disable the AD8333 ?
We use the chip in a pulse doppler application and try to optimize the power consumption without a loss of performance.
Thanks for your question.
Everyone uses the enable pin for the purpose you described, not only to save power but to isolate channels for test purposes. I'm not aware of any limitations, nor have we had any feedback re issues.
I made a test today with an enable switching PRF auf 25kHz (40µs). In the range from always enabled to 35% enabled I got full signal at the outputs. From 35% to 20% the output will decreased and with an enbale time below 8µs I got no signal. In the same time the level on the LODC will decrease with decreased enable time. We have 100nF connected to LODC. Is there a minimum level of LODC for working of the LO ? Can we control this with the value of the LODC capicitor ?
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