We have implemented an a.c coupled amplifier based on the AD8253ARMZ and it is exhibiting an offset voltaje which is larger than we expected. The offset voltage at the imputs has a difference in the order of millivolts, measured with a digital multimeter and with a oscilloscope.
The output voltage, with no a.c signal at the inputs, is a d.c value that depends on the selected gain, though the values for different gains are not exactly proportional.
The power supplies are splitted (+10V/-10V) and a 1.5V voltage (VBIAS) for offseting the output is applied at the REF input. Here is a partial schematic:
The input network capacitors are of NP0 type.
We have assembled two prototypes of our system and both circuits exhibit the same behaviour.
How can we determine the origin of this offset voltage and how can we solve this issue?
Thanks a lot in advance. V.Lorz