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In what format are embedded syncs in ADV7280?

Question asked by Gortu on Jan 12, 2017
Latest reply on Jan 13, 2017 by Gortu

A TI TVP5150 video decoder user is having following problem – STM32F4 has camera interface (called DCIM) that can be used with video decoder ICs, but it expects that the SAV/EAV embedded syncs will be arranged like following:

 

... [FEC]...(frame enddelimiter)

 

line n+0: [SAV] [active video data] [EAV] [horizontal blanking]

 

line n+1: [SAV] [active video data] [EAV] [horizontal blanking]

 

line n+2: [SAV] [active video data] [EAV] [horizontal blanking]

 

 

However TVP5150 arranges them like following:

 

... [FEC]...

 

line n+0: [EAV] horizontal blanking] [SAV] [active video data]

 

line n+1: [EAV] horizontal blanking] [SAV] [active video data]

 

line n+2: [EAV] horizontal blanking] [SAV] [active video data]

 

I wonder, could I have similar problem with my IC of choice – ADV7280?

 

 

DCIM expects 8-10 bit input, pins match perfectly the IC pixel port, the question is about format of the SAV/EAV codes.

 

Best regards,

Sebastian

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