If I am not using the JESD204B SERDES Block, do I need to apply bias for VDD_1P2, DVDD_1P2, PLL_LDO_VDD12, and SYNC_VDD3P3.
You need to apply voltage to all of the supply pins because of internal level shifters, etc. They do not need to be high current since you won't be running the SERDES interface, so you can safely share them with the main 1.2V digital supplies on which the NCO runs. The 3.3V SERDES supply must also be connected because it serves the SERDES PLL VCO (not used in your case) and also the on-chip NVRAM that stores the factory calibration. IF you are using the IOVDD at 3.3V, you could connect the SYNC_VDD3P3 to that same supply. Otherwise, you'd need to generate the 3P3 supply separately.
I moved your question to the High-Speed DACs Community.
Someone here will be able to help you.
Just to clarify, I do not need to sequence IOVDD and SERDES if they are both 3.3V, correct? And would that same statement be true for the 1.2V Digital and 1.2V SERDES supply?
The sequencing requirements still remain. If you're going to combine supplies with different sequencing order, you'll need to add a switch or some other method to correctly sequence the rails.
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