I have a problem about how to sync multiple AD9528.
I would like to sync two DAC boards,DAC sample rate 800Msps. clock below are generated by a AD9528 chip:
800MHz device clock for DAC,
200MHz device clock for Kintex7 FPGA,
6.25MHz SYSREF for DAC and FPGA.
Only PLL2 is enabled, AD9528 output divider sync can only be triggered by SPI writing, 200MHz device clock for two separate FPGAs might be phase misaligned(4 phase relationships since output divider = 4).
AD9528 have no feedback from output divider ,no external sync input, how to sync multiple AD9528s by PLL2?