Are there any timing restriction/specification regarding CEC_CLK ON/OFF timing?
Just want to confirm below associated factors.
- vs. ADV7511W Power on/off
- vs. CEC related I2C register writes
I am not sure exact which parameters you are referring to. The programming guides gives a very good outline how to set it up.
Does you system really require CEC, most systems I see do not require CEC.
Yes, a customer is planning to implement CEC function in their system.
I've just looked into EVAL-7612-7511 schematic and understand like below.
CEC_CLK is generated by Y1(oscillator) and which EN is controlled by AVdd_7511(1.8V).
It seems there is no strict CEC_CLK ON/OFF control timing if this(same timing as 7511's AVDD) is true?
No, there's no strict control
Retrieving data ...