By the way, a bit of proposal. What is the purpose of giving out a "data not ready" signal for every sync clock when there's a decimation rate set to 2 or more? Now if I have fs=2400 Hz and decimation rate of 12 (to achieve 200 Hz final data rate), I need to count "data not ready" fronts, discard every 11 of 12 and then read data from ADIS. While it would be very convenient to have "data not ready" signal synchronized with actual filtered data preparedness - I just wait for proper slope, get an interrupt at some pin and read my sample. For anyway I don't need and won't read any data in-between that final 200 Hz "ticks".