I have a design that interfaces an ADV7611 HDMI Receiver with an ADAU1761 SigmaDSP processor. My DSP is current just passing through the first 2 digital channels to the DACs for debug. I got the design working in I2S mode with stereo data without a problem. In my final design I want to be able to use the TDM8 mode out of the ADV7611 to get 5.1 channel audio processed by the ADAU1761. While testing this scenario I have not been able to get this working with the expected setup.
I am using a 48KHz sampling rate out of the ADV7611 and I have verified that I am receiving 256 samples per frame and the MCLK from the ADV7611 is 12.288MHz. I’ve attached an image showing the setup for the codec and the digital interface from SigmaDSP as well as an oscilloscope trace showing the TDM stream going to the ADAU1761.
In trying to figure out how to get this to work, I happened to place the ADAU1761 in SDATA “MASTER” mode which caused contention on the LRCLK and BCLK lines, but did allow the audio to pass through correctly. This did not work consistently through power cycles and is obviously not a good idea, but for some reason it did work sometimes.