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ADIS16480 external clock and data acquisiton

Question asked by VasilyChe on Dec 19, 2016
Latest reply on Dec 20, 2016 by NevadaMark
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Hello. I'm using ADIS16480 and need some extra explanation about internal data aquisition procedure while using external clock. It is said in the reference manual that "1. WHEN FNCTIO_CTRL[7] = 1, EACH CLOCK PULSE ON THE DESIGNATED DIOx LINE (FNCTIO_CTRL[5:4]) STARTS A 4-SAMPLE BURST, AT A SAMPLE RATE OF 9.84kHz. THESE FOUR SAMPLES FEED INTO THE 4x  AVERAGE/DECIMATION FILTER, WHICH PRODUCES A DATA RATE THAT IS EQUAL TO THE INPUT CLOCK FREQUENCY" and I don't quite understand what happens then I use, for example, 400 Hz input clock. Is it correct that 4 samples at 9.84 kHz are taken (and it takes approx. 400 microseconds to complete), being averaged, and then there's just waiting until the next 400 Hz rising egde appear? Obviously this will only happen 2+ milliseconds later, does it mean that all the angular motions and linear accelerations happening meanwile will be lost?

By the way "Figure 20. Sampling and Frequency Response Signal Flow" itself isn't quite consistent with what's said in note 1 below it: at the picture there's an unconditional "2.46 kHz" and down arrow at the output of the 4x averaging filter, but it's contradictory to "WHICH PRODUCES A DATA RATE THAT IS EQUAL TO THE INPUT CLOCK FREQUENCY" note line. Maybe I don't understand something here too? This is Rev. C of ADIS16480 data sheet.

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