I've been using a DDR3 test project from SHARC AN, change some of the timing parameters to fit my hardware. Attach the project and DDR3 spec. The running of test pass, but sometime later , same hardware , the test turned out to have failure in DMA access of DDR3, while the core DDR3 access still passed.
Could you possibly figure out what might be wrong? configuration of DDR3 timing paramenters or hardware issue (dsp or DDR3)?