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Missing AD9144 FIFO connections for Arria10 DAQ2 design

Question asked by Tjones on Dec 13, 2016
Latest reply on Dec 16, 2016 by AdrianC

The two 64 bit FIFO interfaces between the AD9144_UPACK and the AD9144_CORE modules are erroneously disconnected on the Arria 10 FPGA reference design for the AD-FMCDAQ2 reference design .

AD-FMCDAQ2-EBZ HDL Reference Design [Analog Devices Wiki] 

 

I have successfully modified the daq2_bd.qsys and axi_ad9144_hw.tcl files to add in the connections against the hdl_2016_r1 branch.  

GitHub - analogdevicesinc/hdl at hdl_2016_r1 

 

See attached zip file.

 

Can this please be verified?

 

Thank you,

TJones

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