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ADV739x Vdd_io

Question asked by alon.bendor on Dec 12, 2016
Latest reply on Dec 12, 2016 by GuenterL

Hi

 

There are a few places in the DS of these parts where Vdd_io is defined as 1.71 to 3.63 (table 3, table 4 constraints, table 5 constraints,...) and at others as 1.8 or 3.3V (features, .digital io specifications,...)

Can it be 2.5V?

If yes, what voltage levels should be placed on digital input pins for this Vdd_io?

 

BR,

Alon

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