I have created SDK project from hdf file what was exported from your HDL reference design (hdl/projects/ad6676evb at dev · analogdevicesinc/hdl · GitHub ) .
Problem is that I'm not able to compile your reference SDK code (no-OS/ad6676-ebz at 2016_R2 · analogdevicesinc/no-OS · GitHub ) because there is no exported base address for AD6676_GT in BSP
#define AD6676_GT_BASEADDR XPAR_AXI_AD6676_GT_BASEADDR //XPAR_AXI_AD6676_GT_BASEADDR undeclared
/* Definitions for peripheral AXI_AD6676_CORE */
#define XPAR_AXI_AD6676_CORE_BASEADDR 0x44A10000
#define XPAR_AXI_AD6676_CORE_HIGHADDR 0x44A1FFFF
/* Definitions for peripheral AXI_AD6676_DMA */
#define XPAR_AXI_AD6676_DMA_BASEADDR 0x7C420000
#define XPAR_AXI_AD6676_DMA_HIGHADDR 0x7C42FFFF
/* Definitions for peripheral AXI_AD6676_JESD */
#define XPAR_AXI_AD6676_JESD_BASEADDR 0x44A91000
#define XPAR_AXI_AD6676_JESD_HIGHADDR 0x44A91FFF
/* Definitions for peripheral AXI_AD6676_XCVR */
#define XPAR_AXI_AD6676_XCVR_BASEADDR 0x44A60000
#define XPAR_AXI_AD6676_XCVR_HIGHADDR 0x44A60FFF
I don't see any AD6676_GT in hdl design but it seems this IP core was replaced by AD6676_XCVR if I look at old designs...
So are there some compatibility issues betweeen last no-os drivers and hdl projects or did I overlook something?
We will try to generate some older hdl project, but we would like to avoid it because of upgrading IPs and stuff for Vivado 2016.3.
Also I and my colleague (HDL developer) miss some more documentation of HDL/C sources.
For example links referenced in src like https://wiki.analog.com/resources/eval/user-guides/ad6676-ebz/software/baremetal dont work.
Please don't get me wrong - I have just started to study datasheets about AD6676 and JESD204 so I hope in next days I will be more familiar with this stuff.
Thanks and regards,