we are working hopping system. i.e. 600 hops/sec.Our frequency band is 4.4 to 5GHz. 600 hops means our frame duration around 1.666 ms. in that Tx is750 us and Rx is 750 us remaining is the guard time so TDD mode is not feasible because of LO lock time i.e around 60us. so , we are operating AD9361 in FDD independent mode.
we have some questions regarding this:
1. Is the calibrations should be run in the alert state?
2. we are planning to do Tx synthesizer loading in Rx enable time and Rx synthesizer loading in Tx enable time because both synthesizers are enabled in FDD independent mode.
Here I have doubt, If integer frequency word of synthesizer written through spi,then we need to calibrate vco. is it possible with out alert state?
3. our was hopping system .the frequency changes are more than 100 MHz also. as per data sheet we have to go for other calibrations like Tx quadrature calibration and Rx quadrature calibration. These calibrations took around 94454 clock cycles of clkRF. We can't wait this much of time.
1. what happened if these calibrations ignored?
2. If these are compulsory, is there any alternative?