(Picozed SDR + breakout + custom rf frontend, Linux Kernel 4.6)
In this post the possibility of implementing LTE TDD is being discussed, and the recommendation is to use FDD-independent mode, is this the best choice?
If so, it'd be desirable to control TXNRX and ENABLE signals in real time, but I think no real time behaviour can be achieved from within the Operating System when communicating with the FPGA. Does this mean we need to implement our own HDL IP core into the FPGA to control these two signals? or how else can it be done?
In the linked post @tlili wrote:
Use real-time SPI writes. Put the AD9361 into the normal FDD mode and then use real-time writes to power on/off the Tx LO. The DAC stays on. The writes are to 0x051[D4]. Power up time for the LO is approximately 160ns.
How can I use those real-time SPI writes? If i'm running my program under Linux, I can't see how those would be actual real-time writes.
So far we are planning to emulate this TDD behaviour using software, where we receive and transmit all the time, and then
we discard unwanted received samples in RX, and we transmit zeros in those transmission slots not assignated to our device. This seems too poor and inefficient...