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about ad9234 ADC Test Mode

Question asked by Mangotan on Nov 20, 2016
Latest reply on Dec 2, 2016 by UmeshJ


 I have some questions about my ad9234-1000.

Here is my register setting:


device.OutputSysrefAdc(false);//output_sysref 0

device.WriteAD9234( 0x0, 0x81);// soft reset the device
System.Threading.Thread.Sleep(500);//wait for 500 ms
device.WriteAD9234( 0x01, 0x02);
System.Threading.Thread.Sleep(50);//wait for 50 ms
device.WriteAD9234( 0x008, 0x03);

device.WriteAD9234( 0x571, 0x15);//  power down the link
device.WriteAD9234( 0x58B, 0x83);// enable scrambler and L=4
device.WriteAD9234( 0x201, 0x00);// full sample rate
device.WriteAD9234( 0x570, 0x88);//quick config register register 0x0570 for L=4, M=2, F=1 config

device.WriteAD9234( 0x016, 0x03);
device.WriteAD9234( 0x018, 0x30);
device.WriteAD9234( 0x200, 0x00);
device.WriteAD9234( 0x58F, 0xCB);//3 control bits and N=12
device.WriteAD9234( 0x5B0, 0xAA);/ serdout 0-3 on
device.WriteAD9234( 0x5B2, 0x00);//write 0x00 to serdout 0 register 0x05B2 for serdout 0 = logical lane 0
device.WriteAD9234( 0x5B3, 0x11);//write 0x11 to serdout 1 register 0x05B3 for serdout 1 = logical lane 1
device.WriteAD9234( 0x5B5, 0x22);//write 0x22 to serdout 2 register 0x05B5 for serdout 2 = logical lane 2
device.WriteAD9234( 0x5B6, 0x33);//write 0x33 to serdout 3 register 0x05B6 for serdout 3 = logical lane 3
device.WriteAD9234( 0x58D, 0x1F);// JESD204B K config register 0x058D to for K=32
device.WriteAD9234( 0x56E, 0x00);// 6.25 <= data rate <= 12.5Gbps
device.WriteAD9234( 0x120, 0x0C);//  0x04 for N shot, --0x02 for continuous sysref
device.WriteAD9234( 0x550, 0x6);//  write 0x06 to ADC Test Modes register 0x0550 

////device.WriteAD9234( 0x550, 0x00);
////device.WriteAD9234( 0x580, 0x0);//chip ID
device.WriteAD9234( 0x580, 0x0); 
device.WriteAD9234( 0x581, 0x00); 
device.WriteAD9234( 0x583, 0x00); 
device.WriteAD9234( 0x584, 0x01); 
device.WriteAD9234( 0x585, 0x02); 
device.WriteAD9234( 0x586, 0x03); 
device.WriteAD9234( 0x571, 0x14);// power up the link

device.OutputSysrefAdc(true);// output_sysref 1


   After the completion of the set, in my fpga i can receive the CGS and ILAS data of JESD204B, after lane aligned asserted and decoded the scrambled data,my received data was all zero. I have tried another test mode value to 0x550 also off the test moe( write 0),but the data still was zero. In this case ,when i write 0x573 with JESD204B test mode value(such as 0x8 ramp output),i can receive the right data of the test mode i have set. When I check the sysref status reg.(0x128),i get value  0x8D . I think the adc has correctly captured my SYSREF signal,am i right?

   What should i do next ?

 look forward to your reply,thank you!!