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Insert fifo between adc_pack and adc_dma in hdl2015 fmcomms2

Question asked by LI1234 on Nov 11, 2016
Latest reply on Nov 17, 2016 by DragosB

Hi ,everyone!

   I use hdl 2015 R1 project to test ad9361 with zed. Now I need to store the useful adc_data and remove invalid data, so i want to insert fifo between adc_pack and adc_dmac. when valid data is coming, I make wr_en of fifo ip connect with  dvalid, and make rd_en = !empty of fifo, I connect wr_en and dsync of adc_dmac with rd_en in fifo, data(63 :0) in adc_dmac with dout in fifo. That is OK?