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ADXL354,355: pairs of capasitors on pwr pins in schematic

Question asked by bvn123 on Nov 9, 2016


Figure 57 ADXL354 Application circuit (in datasheet) and Figure 7. EVAL-ADXL354BZ and EVAL-ADXL354CZ Schematic (in User Guide) propose to use pairs of capasitors for each power (or reference) pin (pins 5, 8, 10 & 11)

In datasheet each pair consists of 0.1uF and 1uF,

in User Guide for EVAL-ADXL354 these pairs are 0.1 and 0.1uF (C1 to C11 Capacitors, ceramic, 0.1 μF, 50 V, 10%, X7R, 0603)

and capasitors in each pair are placed side to side on PCB (Figure 1. EVAL-ADXL354BZ and EVAL-ADXL354CZ Evaluation Boards)

If use of such pair of capasitors has some advantages, which pair is better (0.1 + 0.1uF or 0.1+1uF)

or may be 1uF or 1.5uF would be enough?

Or there is no difference when one places 0.1uF or pair of capasitors?