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Unexpected chirp waveform resulting from AD9910

Question asked by scicalo on Nov 7, 2016
Latest reply on Nov 21, 2016 by KennyG

We have built an ad-hoc digital board mounting the AD9910 DDS, whose scope is to generate a chirp waveform at 78.125 MHz with different bandwidth.

 

We are experiencing problems when generating such chirp, i.e., the chirp generated presents spurious bands. We need help to solve this issue.

 

Please, find some results in the document attached, where you can find

   -   two comparisons w.r.t. the chirp generated with the eval board  along with the main parameter used for two different value of bandwidth.

-    Our electrical scheme

-    Our PCB Layout

 

Please, note that our board uses an external 60 MHz clock and we apply the PLL multiplier of 16 to obtain 960 MHz of system clock, whilst the eval board have a system clock of 950 MHz, resulting from the backside crystal oscillator of 25 MHz (PLL multiplier of 36). However, this difference should not be the problem.

 

Finally, please, consider that the chirp is generated by enabling the digital ramp with only no-dwell high enabled. The other setting we have considered are as follows:

 

-   Digital ramp enable   

-   Inverse Sinc Filter enable

-   SYINC_CLK enable 

-   SDIO input only

-   Matched latency enabled

-   Sync timing validation disable

 

So, the resulting VHDL set up of our demo board

 

CONTROL_FUNCTION_1_REG <= (X"00" & X"00" & X"00" & X"00" & DDS_WRITE & DDS_ADDR_00_SEL & X"00" & X"41" & X"00" & X"02");

 

CONTROL_FUNCTION_2_REG <= (X"00" & X"00" & X"00" & X"00" & DDS_WRITE & DDS_ADDR_01_SEL & X"00" & X"4C" & X"00" & X"A0"); 

 

CONTROL_FUNCTION_3_REG <= (X"00" & X"00" & X"00" & X"00" & DDS_WRITE & DDS_ADDR_02_SEL & X"F5" & X"38" & X"C1" & X"20");

 

where

constant DDS_WRITE : STD_LOGIC_VECTOR(2 downto 0) := "000";

constant DDS_ADDR_00_SEL :VECTOR_05_BITS := conv_std_logic_vector(0,5);
constant DDS_ADDR_01_SEL :VECTOR_05_BITS := conv_std_logic_vector(1,5);
constant DDS_ADDR_02_SEL :VECTOR_05_BITS := conv_std_logic_vector(2,5);

 

Could you please help us to solve this problem?

 

Thanks in advance.

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