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AD9652 PN test sequence

Question asked by maryg on Nov 4, 2016
Latest reply on Nov 10, 2016 by PMH



AD9652 is connected to an FPGA. It generates PN sequences and the FPGA has an analyzer to check them.


AD9652 data sheet reports non-standard PN sequences PN23 and PN9 (pag 33, register 0x0D "Test Mode", reg val: 0101 and 0100).

PN23 ->

reported: 1 + x^17 + x^22

standard: 1 + x^18 + x^23

PN9 ->

reported: 1 + x^3 + x^8

standard: 1 + x^5 + x^9


1) Are these sequences generated using "Forward Counter Implementation" or "Backward Counter Implementation"? (Xilinx XAPP884) (see picture below)

2) Do you already have a VHDL or verilog module that can test these sequences after samples reach the FPGA?