I would like to implement a minimal component Blackfin DSP solution (no external memory or flash boot device).
Instead, the Blackfin DSP will be connected to a Xilinx FPGA as a co-processor to the FPGA. The FPGA will be responsible for loading the application code into one of the Blackfin DSP embedded memories.
Our application software is generally quite small (~128KB) and needs to be loaded quickly on the fly by the FPGA.
I am specifically interested in one of the following two Blackfin processors:
1) ADSP-BF706: 1MB SRAM
2) ADSP-BF609: 256KB SRAM
My question is as follows:
1) Provided our application code is small enough, can a Blackfin DSP execute instruction code stored in it's own embedded SRAM? Or do Blackfin DSPs need external DDR2/DDR3 SDRAM to store and execute instruction memory?