I use ADV7842 with signal generator(TG45AX) Chroma + BURST to 7%, and adjust the ADV7842 SDP_CK_LOW_THR[6:0] to max value, but the CKILL is still not active.
Until I adjust Chroma + BURST to 1%, the CKILL is active .
I check the SDP_BURST_LOCKED_RB, it always detect "LOCK" even the Chroma + BURST 2%
ACC on/off, the result is same.
I have another model which use ADV7842, the CKILL is active about 7% with ADV7842 SDP_CK_LOW_THR[6:0] to max value, this is what I expected. I compare the register setting, it cannot find different.
Is it relative HW circuit?
It seems that the burst is very "strong"?
Any comment about the CKILL cannot active?
Attachment picture is A11 CVBS input waveform, is it correct?