When building a project for the SC589 in Cross Core, the .ld/.ldf map the shared L2 SRAM as follows (as noted in the SHARC app.ldf):
bank1 2008_0000 2008_7FFF 4KB uncached - ICC
4KB uncached - MCAPI ARM
4KB uncached - MCAPI SHARC1
4KB uncached - MCAPI SHARC0
16KB uncached - ARM
bank2 2008_8000 2008_FFFF 32KB cached - ARM
bank3 2009_0000 2009_7FFF 32KB cached - ARM
bank4 2009_8000 2009_FFFF 32KB cached - ARM
bank5 200A_0000 200A_7FFF 32KB cached - SHARC1
bank6 200A_8000 200A_FFFF 32KB cached - SHARC1
bank7 200B_0000 200B_7FFF 32KB cached - SHARC0
bank8 200B_8000 200B_DFFB 24KB cached - SHARC0
The linkers for both the ARM and SHARC will allow you to reapportion the memory differently, but this does not change the fact that BANK 2 - 8 continue to be cached.
Is my desire to reconfigure a large portion of this RAM as uncached, however I see no mechanism to achieve this. Any help would be greatly appreciated.