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HDL-2015r1 Zed axi_dmac

Question asked by LI1234 on Oct 31, 2016
Latest reply on Nov 1, 2016 by rejeesh

Hi everyone,

   I use hdl 2015 r1 project to test the ad-fmcomms2-ebz. I'm very curious about the axi_dmac core, but I can't understand what dose it do? Could anyone tell me some tips?

   By the way because i need to capture data when i got the tx_flag but there is time delay between tx_flag in PL and dma control in Ps and the delay is not accurate. So i plan to use a fifo to capture the data when the pulse signal arrives, and DMA transmit the fifo data into the DDR between the pulse signals. I want to use bram core connect the adc_pack, .clka -- lclk, dina -- ddata,wea -- dvalid, ena -- tx_flag, addra connect to cnt changed by lclk.But I don't know how to connect DMA?anyone tell me?