The reference manual UG763 explains all different modes (dual port full/half duplex) in CMOS mode.
But only full duplex in LVDS mode.
The thing is that CMOS is not really supported: Introduction to boards based on the AD9361/AD9364 [Analog Devices Wiki]
“While the AD9361 digital interface supports both LVDS and CMOS mode, all the FMCOMMS boards have been verified in LVDS mode only. Configuring the digital interface in CMOS mode is not tested nor supported on these platforms. This is due to the purposefully weak CMOS drivers (To keep the noise off the part as much as possible) that are part of the digital interface and the large capacitance of the FMC connector.
Is half duplex in LVDS mode possible?
If so, are the data bus signals (P0/P1 or better Rx_D / Tx_D) used as described in CMOS mode?