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About Sigma300(ADAU1452) Architecture

Question asked by IRON on Oct 25, 2016
Latest reply on Nov 14, 2016 by DaveThib

Hello all,

I've got a question on SigmaDSP's architecture.

On the data sheet p.22, there is a line just as below.


"By using a quadruple multiply accumulator (MAC) data path, the ADAU1452/ADAU1451 can execute more than 1.2 billion MAC operations per second"


I know that this speed is the theoretically fastest processing speed that the Sigma300 could possibly do.

But, could you please tell me how to accomplish it in detail?


Can this be accomplished only where there are MAC processing?


In case of "Dual MULT - Accum * Data - Double Precision"

The Functional Description says as below
Calculate the result of 2 accumulator register * data register as 8.56*8.24 in parallel.


This cannot calculate as 8.56*8.56?

Is there any limitation because of this?


Best Regards.