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SPI Slave Mode in BF 60X

Question asked by ColdRaven on Oct 25, 2016
Latest reply on Nov 9, 2016 by ColdRaven

Hello .

 

I have one problem

 

this BF608 SPI DMA doesn't work in SPI Slave mode

 

Do you have Example or recommend register setting?

 

and I add my source

 

Rx DMA and SPI well but TX Dma some problem

 

it have occurred Tx DMA Done Interrupt but it doesn't sent Data

 

 

/*******************************************************************
* global defines: Modify as per requirement
*******************************************************************/
#define BUFF_SIZE 8

#define SPI0_MSTR 0 // 1: SPI0 master 0: SPI1 slave;
#define CPHA 1
#define CPOL 0
#define SPI_SIZE 0 // 0: 8-bit, 1: 16-bit 2: 32-bit
#define LSBF 0 // 0: MSB bit first 1: LSB bit first
//-----------------------------

/*******************************************************************
* Data definition
*******************************************************************/
unsigned char SPI0_RxBUFF[BUFF_SIZE];
unsigned char SPI0_TxBUFF[BUFF_SIZE];

bool SPI0_Tx_Done, SPI0_Rx_Done, SPI1_Tx_Done, SPI1_Rx_Done;

void SPI0_RxDMA_Handler(uint32_t iid, void *handlerArg)
{
*pREG_DMA7_STAT = ENUM_DMA_STAT_IRQDONE;
SPI0_Rx_Done = true;
*pREG_DMA7_CFG &= (~ENUM_DMA_CFG_EN);
*pREG_DMA7_CFG |= ENUM_DMA_CFG_EN;

*pREG_SPI0_RWC = BUFF_SIZE;
}

void SPI0_TxDMA_Handler(uint32_t iid, void *handlerArg)
{
*pREG_DMA6_STAT = ENUM_DMA_STAT_IRQDONE;
SPI0_Tx_Done = true;

*pREG_DMA6_CFG &= (~ENUM_DMA_CFG_EN);
*pREG_DMA6_CFG |= ENUM_DMA_CFG_EN;

*pREG_SPI0_TWC = BUFF_SIZE;
}

/***************************************************************************************************************************************************************
* Function name : Init_SPI0
* Description : Initialises the SPI0 control registers beased on minimum macro settings given in main.h
***************************************************************************************************************************************************************/
void Init_SPI0(void)
{

*pREG_SPI0_DLY = (((1 << BITP_SPI_DLY_STOP) & BITM_SPI_DLY_STOP)
| ((1 << BITP_SPI_DLY_LEADX) & BITM_SPI_DLY_LEADX)
| ((1 << BITP_SPI_DLY_LAGX) & BITM_SPI_DLY_LAGX));

*pREG_SPI0_CTL = (((SPI0_MSTR << BITP_SPI_CTL_MSTR) & BITM_SPI_CTL_MSTR)
| ((CPHA << BITP_SPI_CTL_CPHA) & BITM_SPI_CTL_CPHA)
| ((CPOL << BITP_SPI_CTL_CPOL) & BITM_SPI_CTL_CPOL)
| ((SPI_SIZE << BITP_SPI_CTL_SIZE) & BITM_SPI_CTL_SIZE)
| ((LSBF << BITP_SPI_CTL_LSBF) & BITM_SPI_CTL_LSBF) |
BITM_SPI_CTL_ASSEL | BITM_SPI_CTL_SELST);

*pREG_SPI0_RXCTL = (ENUM_SPI_RXCTL_RWC_EN | ENUM_SPI_RXCTL_RDR_25);
*pREG_SPI0_TXCTL = (ENUM_SPI_TXCTL_TWC_EN | ENUM_SPI_TXCTL_TDR_25);

*pREG_SPI0_RWC = BUFF_SIZE;

*pREG_SPI0_RWCR = 0x00;

*pREG_SPI0_TWC = BUFF_SIZE;

*pREG_SPI0_TWCR = 0x00;

}

void Init_SPI0_DMA(void)
{
*pREG_DMA7_CFG = (ENUM_DMA_CFG_WRITE | ENUM_DMA_CFG_STOP
| ((SPI_SIZE << BITP_DMA_CFG_PSIZE) & BITM_DMA_CFG_PSIZE)
| ENUM_DMA_CFG_MSIZE01 | ENUM_DMA_CFG_XCNT_INT);
*pREG_DMA7_ADDRSTART = SPI0_RxBUFF;
*pREG_DMA7_XCNT = BUFF_SIZE;
*pREG_DMA7_XMOD = 1;
*pREG_DMA7_CFG |= ENUM_DMA_CFG_EN;

*pREG_DMA6_CFG = (ENUM_DMA_CFG_SYNC| ENUM_DMA_CFG_READ | ENUM_DMA_CFG_STOP
| ((SPI_SIZE << BITP_DMA_CFG_PSIZE) & BITM_DMA_CFG_PSIZE)
| ENUM_DMA_CFG_MSIZE01 | ENUM_DMA_CFG_XCNT_INT);
*pREG_DMA6_ADDRSTART = SPI0_TxBUFF;
*pREG_DMA6_XCNT = BUFF_SIZE;
*pREG_DMA6_XMOD = 1;
*pREG_DMA6_CFG |= ENUM_DMA_CFG_EN;
}

/***************************************************************************************************************************************************************
* Function name : Init_SPI0_Interrupts, Init_SPI1_Interrupts
* Description : Enables the SPI0 and SPI1 Tx DMA interrupts
***************************************************************************************************************************************************************/
void Init_SPI0_Interrupts(void)
{
adi_int_InstallHandler(INTR_SPI0_RXDMA, SPI0_RxDMA_Handler, 0, true);

adi_int_InstallHandler(INTR_SPI0_TXDMA, SPI0_TxDMA_Handler, 0, true);
}

/***************************************************************************************************************************************************************
* Function name : Enable_SPI0
* Description : Enables the SPI0 Tx channel
***************************************************************************************************************************************************************/
void Enable_SPI0(void)
{
*pREG_SPI0_RXCTL |= BITM_SPI_RXCTL_RTI | BITM_SPI_RXCTL_REN;
*pREG_SPI0_TXCTL |= BITM_SPI_TXCTL_TTI | BITM_SPI_TXCTL_TEN;
*pREG_SPI0_CTL |= ENUM_SPI_CTL_EN;
}

void testSpiMain(void)
{

//Init_SPI0_PORTs();
Init_SPI0();
Init_SPI0_DMA();
Init_SPI0_Interrupts();

SPI0_TxBUFF[0] = 1;
SPI0_TxBUFF[2] = 2;
SPI0_TxBUFF[4] = 3;
SPI0_TxBUFF[6] = 4;

Enable_SPI0();
while (1)
{
asm("nop;");

}

}

Outcomes