I am using two ADAU1372 chip to get 8 channel ADC & 2 channel DAC using TDM8 Mode.
Now we got our first PCB board and start to work.
After set the registers , we found the TDM8 mode has some problem at sample rate of 32KHz .
MCLK = 12.288 XTAL.
PLL = OFF.
Reg: 0x32（SAI_0）= 0x75（left justified、TDM8、32KHz fs）
Reg: 0x33（SAI_1）= 0x65
TDM8 Mode , 16 bclk cycle per channel, Master mode.
We directly connect the output data pin to the input data pin to loop back the mic to the dac.
1:We got bclk = 6.144MHz. and LRCLK=32KHz.
2: we can hear the loop back audio , but it is the wrong one which different from what we just said.
3: we check the signal: one LRCLK have 192bit BCLK, there is no data while bclk (128bit-192bit).
I think the bclk should be 4.096MHz, Because 32K * 8 * 16(cycles per channel) = 4.096MHz.
And one LRCLK should have 128bit BCLK.
I don't know why bclk = 6.144MHz happen while 32KHz.
48K Hz , TDM8,--> Bclk = 6M. loop back audio test passed.
48K Hz, TDM4, --> Bclk = 3M. loop back audio test passed.
32K Hz, TDM8,--> Bclk = 6M. loop back audio test failed.
I2S + 32K ,BCLK = 1M --> Fine.
I2s + 16k ,bclk = 512k --> Fine。
I want to get a bclk = 4.096MHz at 32KHz TDM8 Mode.
Anyone can help me out?
1: signal picture TDM8+32K.
2: sch file.