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AD9670 Decimation problem

Question asked by PieroS. on Oct 21, 2016
Latest reply on Oct 26, 2016 by PieroS.

Dear All

I have a problem with high decimation rate of of the AD9670. I test the evaluation board with internal clock source of 40MHz. I use the files attached and the standard "AD9670_14Bit_125MSspiR03.mmp" for the SPIcontroller.

The configuration attached select the profile 15 (0xE), the decimator factor is 28 and it work fine (frequency out 40Mhz / 28 = 1.428Mhz).


1) If I select the profile 16 (0x0F) (by write the value 0x2F in the register 0x10C of the file "Test.AD9670_Initialization_v2.mgp"), the decimator factor must be 32 but this configuration not working. Why that?

"Visual Analog" sems to read only a previous buffer data.

2) Also if I don't change the profile by selecting profile 15 (0xE), but enable the RF 2x decimator (by writing the value 0x4 in the register 0x113), the decimator must be 28x8=224 and the final output frequency 0.714MHz. This configuration don't work always. Often have the problem explain in 1)

Also if I select RF 2x decimator and select the profile 16 (0x0F) (write the value 0x2F in the register 0x10C of the file "Test.AD9670_Initialization_v2.mgp"), this configuration must decimate by 64 but don't work, it has always the same problem explain in 1).


What's wrong in my configuration? Why I have problem with high decimation rate?


This is a great problem for me, because I must use lower frequency. The EVB work with 40Mhz oscillator, but in my project there are 24Mhz oscillator and I must use the maximum decimation possible (64) to obtain an output rate of 0.375MHz.


Best Regards