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AD9361 RX path clock explanation

Question asked by dmitriy00 on Oct 19, 2016
Latest reply on Oct 19, 2016 by tlili

Hello. The purpose of this question is to understand how all these clock rates relate to the clock rate used in a traditional, discreet Sample-And-Hold ADC. In a design that uses a discreet S&H ADC the signal is oversampled by an amount that yields the ADC sampling clock rate of 1.6MHz. In AD9361 is setting RXSAMP=1.6MHz equivalent to clocking a S&H ADC at 1.6MHz? Assuming that all HB filters are bypassed, and there is no decimation or interpolation all the way to the IQ bus, what is the relationship between "ADC" and "RXSAMP" rates? Is the "ADC" rate the actual clock used to get the 12 bit resolution? And finally, what is the relationship between "BBPLL" and "ADC"?     

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