In a design phase we've used the ADF4108 evaluation board in conjunciton with the ROS-2015+ (Mini-Circuits) VCO to generate a 2Ghz fixed frequency LO from a 100MHz sinewave OCXO.
We've used the ADIsim PLL software to design a 2nd order passive loop filter.
The settings for ADIsim PLL were:
- PDF: 1000KHz
- REF: 100MHz
- VCO: ROS2015+
- Chargepump voltage: 3.3V (standard on the ADF4108 eval board)
- Loop filter: 2nd order passive.
This setup was tested with success. We then went on and implemented that design on a prototyping board. With the exact same settings, the PLL on the prototyping board does not want to lock to 2GHz. The output frequency seems to be modulated.
I've added the schematic and the output of the Spectrum analyser. Does anyone have an Idea why this doesn't work on the prototype board, but does on the evaluation board?