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Simulation model for AD9144

Question asked by maryg on Oct 18, 2016
Latest reply on Nov 23, 2016 by maryg

Hi,

 

1) is there a VHDL (or Verilog) simulation model for AD9144 JESD DAC?
2) if not, any other sim model for JESD DAC?

 

I think it'd help us validating the FPGA design we're developing.


Thanks!

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