I have a question AD7124 excitation current.
When Iout was made open in the state by which Iout was output,
The voltage of the Iout terminal is saturated with 3.3V.Is this how to use no problem?
The AD7124 IOUT has an output compliance of AVSS-0.05V to AVDD-0.37V for 50uA/100uA/250uA/500uA and AVSS-0.05V to AVDD-0.48V for 750uA/1000uA current sources. These specifications must be meet, so if you have an AVDD=3.3V, the maximum voltage should be less than 3.3V.
Thank you for your support!
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