we have recently obtained an ADV7180 evaluation kit, but we are finding strange behaviour on the LLC pin.
Initially the card was configured to have Vddio as 3.3V
When a video source is applied, decoded data signals are detected on the test pins ranging from 0V to 3V (as expected). However, the LLC pin does not give a full-scale signal, it ranges from 0.9V to 2.4V. The LLC frequency is approx 27MHz as expected, it is just the signal amplitude that appears to be incorrect.
We modified the card so that Vddio was 1.8V.
Again, data signals were detected with voltage levels as expected, however the LLC voltage amplitude was only 0.5V - 1.2V.
We would like to route the clock and data signals into an FPGA, but the clock signal amplitude is outwith the required voltage range for the FPGA.
Can the clock voltage amplitude be controlled vie I2C, I cannot see any register settings within the datasheet.
Thanks for any help.