I am using ADAU1452 EVM together with Sigma Studio for study.
Can ADAU1452 set as I2S loopback mode? I'd want to use Serial Input Port3 to Serial output port0.
The purpose is for production. Detail are listed below
The evaluation board does not have a loopback feature. All you need to do is create a SigmaStudio project that does that for you. This would be an excellent thing to do as a first project. So since I also teach as an adjunct at a couple of local universities, I will not supply you with a project that does this. This is a good exercise for you. Please ask questions if you get stuck.
The datasheet for the part has a lot of info but the user guide for the evaluation board is a really good resource. The serial ports are mapped to certain input channels in the DSP. This diagram shows it well.
Here you see that serial port 3 is mapped to inputs 40-47. This input port is only capable of TDM 8 as the most channels you can send on this port. You can only use two, or four, so you do not have to use all 8.
Then on the output side here is the diagram that shows you how it is mapped:
So serial port 0 is channel 0-15 so it can output up to 16 channels if needed.
So your project can literally connect these two points and that is it. But, I would put in a volume control and a mute for each channel so you can verify that it is working.
One more thing. You may have to change some of the register settings of the part. It should default to both ports being a master but that might not be what you want. Here is where these settings are:
Thanks for your quick response.
My major issue is the clock routing.
How to route the input clock (BCLK & LRCLK ) to output side? I guess output clock is generated by 1452 if i set slave at input side and master at output side. I hope all of signals at output side, which are from input side respectively.
This part is very flexible as far as clocking goes. This makes it a bit complicated. In SigmaStudio you can easily set the register to route the data directly from the serial input port to the output port bypassing the DSP altogether. However, you cannot do this with the clocks.
The output ports can get their clocks either from another output port, that is set as a slave, or it can get it from the clock generators.
The Core can get its clock from the serial input ports by setting the start pulse in the Core Control tab. This will start the program executing every clock cycle right after the data is clocked in.
The clocking of the output ports will still be from the clock generators but internally this slight difference it taken care of.
As long as all the parts in the system are running from the same master clock this all works fine.
If you have something that is on a different master clock then you have to use the ASRCs to prevent clicks and pops. This is a whole other discussion.
So are all parts of your system running on the same master clock?
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