My customer wants to generate exact power of 2 fractions of 1Hz (eg 2^1/4, 2^1/8, 2^1/16). We will be clocking the DDS at 2500MHz. How do I set up the DRG to achieve this? Clearly B will need to be 2500 or some power of 2 times 2500.
Just to clarify, your customer wants a frequency sweep from 1Hz to 1Hz*2^1/4 to 1Hz*2^18 and so on?
Let's simplify for now. The Customer wants exact resolution values of 1Hz, 1/2Hz, 1/4Hz, 1/8Hz etc. We need to generate 100-200MHz out. We are clocking with 2500Mhz (or sometimes 2300Mhz to avoid your spurs).
There isn't an easy answer to the question if you are reducing the ratio, the value of B won't be constant, so you would need to program all registers for each desired value. If that's not too cumbersome, it's a fine approach, but if they want to keep the B value constant, I think the right approach is to establish the finest granularity they need, and calculate what the B value would have to be in order to support that output frequency
So if they wanted granularity of 1/8th Hz (=0.125 Hz), calculate for B using a ratio of .125/2.5G, meaning B must = 20,000,000,000
Give me a few days to think this through. The solution you initially came up with I think would work. If you set B = 2,500,000,000 (0x9502F900) to cancel Fsysclk in the equation for Fout that should give you resolution down to 1/2^32 but I want to spend some more time trying to figure out the absolute best value for B. I'll try to write up some equations in a word document to explain my thought process and post them later.
Below is the basic equation for calculating Fout using programmable modulus. FTW, A, and B are 32-bit register values and N=32.
One way of working with programmable modulus, as Jeff suggested, is to solve this equation for the frequency resolution that you want. In your case you don’t have a defined resolution, you want to get a resolution of 1/2X where X is as large as possible. Another simplification we can make is that if we are solving for a significantly small ΔFout that ΔFTW will equal 0 (if needed I can prove this out).
From the above equation we can easily see that if B = Fsysclk and ΔA = 1 that the equation resolves into…
…where X=N. To get a larger value for X we could repeatedly double the value of B, but only if it does not exceed the maximum register value of 232-1. In your case where Fsysclk=2.5GHz (2.5x10^9) doubling it once would exceed this limit, so the best you can do is B = 2,500,000,000 (0x9502F900). So with FTW = 0, A = 1, and B = 2,500,000,000 the output frequency would be 1/232. Doubling A would set the output frequency to 1/231 and doubling again would give 1/230, and so on.
Now say you want to solve for FTW and A, where B is set to Fsysclk, for an FOUT of 152,621,186.971460767090320587158203125 Hz (the decimal part is 4,172,392,224 / 232). Rearranging the Fout equations from above to solve for FTW and A gives the equation below.
The FTW has to be the integer portion while A has to pick up the remainder fractional part.
Solving for FTW and A gives…
The result is FTW = 262,201,202 and A = 1,719,125,280.
Beware of rounding Errors due to limited precision of your calculator, software, or processor. I used the MS calculator on my computer for the values above and I'm not 100% sure I avoided rounding errors myself. To be more precise, I think splitting the problem into two parts where you solve for the integer portion of your desired Fout separate from the decimal portion might be the way to go. I can give an explanation of this approach if needed.
If you want to push the resolution even further, you could reduce your system clock below 2^29 Hz (536,870,912 Hz)such as 500MHz which would allow you to set B=8*Fsysclk and increase the resolution by a factor of 8. Meaning you could get a resolution of 1/2^35 instead of 1/2^32. A 500MHz Fsysclk should just be high enough to create a 200MHz output signal. Likewise with an Fsysclk < 2^30 Hz (1,073,741,824 GHz) you can get a resolution of 1/2^34 and with an Fsysclk < 2^31 (2,147,483,648 Hz) you can get a resolution of 1/2^33.
To Jeff's point, a constant B value is not quite workable in this case, as B is constrained to 32-bits (4,294,967,295 max.).
How restricted to the 2.5GHz sample rate are they? If they can move to 2.5769803776 GHz, they should be able to set up the device to hit the 1kHz and halves, quarters, etc. of 1kHz. Note they might want to move to the AD9914 at this rate. Alternatively, 2.147483648 GHz could also enable those precise settings.
Retrieving data ...