Hi, in my ADV7611 design both hsync and sync are active low signals. For the
duration of sync active (low), hsync also becomes low. But in my design I do require,
that hsync pulses do continue in the vsync active period. Is there a setting in
a register, where I can enable hsync pulses during vsync?
I have attached a screenshot with the hsync (blue - 37 kHz)) and vsync (yellow - 50 Hz) timing. It shows one field of a 1080i50 signal.
Thanks and best regards, Jurgen